Circuits for the distribution and synchronization of timing information play a key role in a number of applications which require a synchronus transfer of data, such as networks for transferring telephone calls over various networks, including the internet, and the like.
Current methods of signal synchronization between sub-networks do not provide complete synchronization. Incomplete synchronization results in data losses called slips. Compensating networks, including buffer circuitry, are typically used to compensate for slips caused by a lack of clock synchronization.
Those having skill in the art will understand the desirability of having a completely synchronus timing of sample collection and reconstruction that eliminates slips and the need for compensating circuitry. This type of network would provide complete synchronization of clocks between sub-networks by providing a series of clocks slaved to a master clock.
There is therefore provided in a present embodiment of the invention a method for synchronizing clocks in a packet transport network. The method comprises, receiving an external network clock at a central packet network node and transmitting timing information to a plurality of packet network devices, the timing information based upon the external network clock.
The method further comprises, transmitting and receiving data that is synchronized to the timing information to a plurality of connected packet network devices. And finally, delivery of packets to an external interface via a packet network that contains data synchronized to the external network clock.
Many of the attendant features of this invention will be more readily appreciated as the same becomes better understood by reference to the following detailed description considered in connection with the accompanying drawings.